mirror of
git://repo.or.cz/tinycc.git
synced 2026-06-17 15:44:18 +08:00
Correct riscv load_large_constant
Some checks are pending
build and test / test-x86_64-linux (push) Waiting to run
build and test / test-x86_64-osx (push) Waiting to run
build and test / test-aarch64-osx (push) Waiting to run
build and test / test-x86_64-win32 (push) Waiting to run
build and test / test-i386-win32 (push) Waiting to run
build and test / test-armv7-linux (push) Waiting to run
build and test / test-aarch64-linux (push) Waiting to run
build and test / test-riscv64-linux (push) Waiting to run
Some checks are pending
build and test / test-x86_64-linux (push) Waiting to run
build and test / test-x86_64-osx (push) Waiting to run
build and test / test-aarch64-osx (push) Waiting to run
build and test / test-x86_64-win32 (push) Waiting to run
build and test / test-i386-win32 (push) Waiting to run
build and test / test-armv7-linux (push) Waiting to run
build and test / test-aarch64-linux (push) Waiting to run
build and test / test-riscv64-linux (push) Waiting to run
This commit is contained in:
parent
7c23c48a93
commit
2eca4df6e9
@ -222,7 +222,7 @@ static void load_large_constant(int rr, int fc, uint32_t pi)
|
||||
EI(0x13, 1, rr, rr, 12); // slli RR, RR, 12
|
||||
EI(0x13, 0, rr, rr, (fc + (1 << 19)) >> 20); // addi RR, RR, up(lo(fc))
|
||||
EI(0x13, 1, rr, rr, 12); // slli RR, RR, 12
|
||||
fc = fc << 12 >> 12;
|
||||
fc = (fc + (1 << 7)) << 12 >> 12;
|
||||
EI(0x13, 0, rr, rr, fc >> 8); // addi RR, RR, lo1(lo(fc))
|
||||
EI(0x13, 1, rr, rr, 8); // slli RR, RR, 8
|
||||
}
|
||||
@ -233,7 +233,7 @@ ST_FUNC void load(int r, SValue *sv)
|
||||
int v = fr & VT_VALMASK;
|
||||
int rr = is_ireg(r) ? ireg(r) : freg(r);
|
||||
int fc = sv->c.i;
|
||||
int save_fc = fc;
|
||||
uint64_t save_fc = sv->c.i;
|
||||
int bt = sv->type.t & VT_BTYPE;
|
||||
int align, size;
|
||||
if (fr & VT_LVAL) {
|
||||
@ -264,7 +264,7 @@ ST_FUNC void load(int r, SValue *sv)
|
||||
si >>= 32;
|
||||
if (si != 0) {
|
||||
load_large_constant(rr, fc, si);
|
||||
fc &= 0xff;
|
||||
fc = fc << 24 >> 24;
|
||||
} else {
|
||||
o(0x37 | (rr << 7) | ((0x800 + fc) & 0xfffff000)); //lui RR, upper(fc)
|
||||
fc = fc << 20 >> 20;
|
||||
@ -289,7 +289,7 @@ ST_FUNC void load(int r, SValue *sv)
|
||||
si >>= 32;
|
||||
if (si != 0) {
|
||||
load_large_constant(rr, fc, si);
|
||||
fc &= 0xff;
|
||||
fc = fc << 24 >> 24;
|
||||
rb = rr;
|
||||
do32bit = 0;
|
||||
} else if (bt == VT_LLONG) {
|
||||
@ -379,7 +379,7 @@ ST_FUNC void store(int r, SValue *sv)
|
||||
int fr = sv->r & VT_VALMASK;
|
||||
int rr = is_ireg(r) ? ireg(r) : freg(r), ptrreg;
|
||||
int fc = sv->c.i;
|
||||
int save_fc = fc;
|
||||
uint64_t save_fc = sv->c.i;
|
||||
int bt = sv->type.t & VT_BTYPE;
|
||||
int align, size = type_size(&sv->type, &align);
|
||||
assert(!is_float(bt) || is_freg(r) || bt == VT_LDOUBLE);
|
||||
@ -406,7 +406,7 @@ ST_FUNC void store(int r, SValue *sv)
|
||||
si >>= 32;
|
||||
if (si != 0) {
|
||||
load_large_constant(ptrreg, fc, si);
|
||||
fc &= 0xff;
|
||||
fc = fc << 24 >> 24;
|
||||
} else {
|
||||
o(0x37 | (ptrreg << 7) | ((0x800 + fc) & 0xfffff000)); //lui RR, upper(fc)
|
||||
fc = fc << 20 >> 20;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user