From 46bf3f940c24f277e6cacdbe468db6f781f80f48 Mon Sep 17 00:00:00 2001 From: Brian Callahan Date: Fri, 9 Jul 2021 12:16:18 -0400 Subject: [PATCH] Add register definitions for OpenBSD/riscv64 --- tccrun.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/tccrun.c b/tccrun.c index 792e6be2..9c9f4e07 100644 --- a/tccrun.c +++ b/tccrun.c @@ -733,6 +733,9 @@ static void rt_getcontext(ucontext_t *uc, rt_context *rc) #elif defined(__aarch64__) rc->ip = uc->uc_mcontext.pc; rc->fp = uc->uc_mcontext.regs[29]; +#elif defined(__riscv) && defined(__OpenBSD__) + rc->ip = uc->sc_sepc; + rc->fp = uc->sc_s[0]; #elif defined(__riscv) rc->ip = uc->uc_mcontext.__gregs[REG_PC]; rc->fp = uc->uc_mcontext.__gregs[REG_S0];