From 85ba3ae8f1e22044255d54c28be04e5fc3e88ae0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Sigrid=20Solveig=20Hafl=C3=ADnud=C3=B3ttir?= Date: Fri, 24 Jul 2026 19:22:56 +0200 Subject: [PATCH] {arm,i386,riscv64}-asm.c: fix generic operand modifier 'n' not negating --- arm-asm.c | 2 +- i386-asm.c | 2 +- riscv64-asm.c | 4 ++-- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arm-asm.c b/arm-asm.c index 2f9cca46..fa7b483d 100644 --- a/arm-asm.c +++ b/arm-asm.c @@ -2631,7 +2631,7 @@ ST_FUNC void subst_asm_operand(CString *add_str, SValue *sv, int modifier) val = sv->c.i; if (modifier == 'n') val = -val; - cstr_printf(add_str, "%d", (int) sv->c.i); + cstr_printf(add_str, "%d", val); no_offset:; } else if ((r & VT_VALMASK) == VT_LOCAL) { cstr_printf(add_str, "[fp,#%d]", (int) sv->c.i); diff --git a/i386-asm.c b/i386-asm.c index 884b18cb..1887490d 100644 --- a/i386-asm.c +++ b/i386-asm.c @@ -1536,7 +1536,7 @@ ST_FUNC void subst_asm_operand(CString *add_str, val = sv->c.i; if (modifier == 'n') val = -val; - cstr_printf(add_str, "%d", (int)sv->c.i); + cstr_printf(add_str, "%d", val); no_offset:; #ifdef TCC_TARGET_X86_64 if (r & VT_LVAL) diff --git a/riscv64-asm.c b/riscv64-asm.c index 583b1901..b35615fc 100644 --- a/riscv64-asm.c +++ b/riscv64-asm.c @@ -2158,10 +2158,10 @@ ST_FUNC void subst_asm_operand(CString *add_str, SValue *sv, int modifier) val = sv->c.i; if (modifier == 'n') val = -val; - if (modifier == 'z' && sv->c.i == 0) { + if (modifier == 'z' && val == 0) { cstr_cat(add_str, "zero", -1); } else { - cstr_printf(add_str, "%d", (int) sv->c.i); + cstr_printf(add_str, "%d", val); } no_offset:; } else if ((r & VT_VALMASK) == VT_LOCAL) {