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Another update for clang -fsanitize

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arm-link.c:    remove some casts
tccelf.c:      code style and remove code
tccpp.c:       use correct pointer size so cross compiling works
riscv64-gen.c: make code more readable
This commit is contained in:
herman ten brugge 2025-08-03 10:22:26 +02:00
parent 666e88ee2a
commit 8a0ccbbd94
4 changed files with 26 additions and 23 deletions
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14
arm-link.c
View File

@ -204,7 +204,7 @@ ST_FUNC void relocate(TCCState *s1, ElfW_Rel *rel, int type, unsigned char *ptr,
x = (unsigned) x << 2; x = (unsigned) x << 2;
blx_avail = (CONFIG_TCC_CPUVER >= 5); blx_avail = (CONFIG_TCC_CPUVER >= 5);
is_thumb = val & 1; is_thumb = val & 1;
is_bl = ((unsigned) read32le(ptr)) >> 24 == 0xeb; is_bl = read32le(ptr) >> 24 == 0xeb;
is_call = (type == R_ARM_CALL || (type == R_ARM_PC24 && is_bl)); is_call = (type == R_ARM_CALL || (type == R_ARM_PC24 && is_bl));
x += val - addr; x += val - addr;
#ifdef DEBUG_RELOC #ifdef DEBUG_RELOC
@ -241,8 +241,8 @@ ST_FUNC void relocate(TCCState *s1, ElfW_Rel *rel, int type, unsigned char *ptr,
return; return;
/* Get initial offset */ /* Get initial offset */
hi = (uint16_t) read16le(ptr); hi = read16le(ptr);
lo = (uint16_t) read16le(ptr+2); lo = read16le(ptr+2);
s = (hi >> 10) & 1; s = (hi >> 10) & 1;
j1 = (lo >> 13) & 1; j1 = (lo >> 13) & 1;
j2 = (lo >> 11) & 1; j2 = (lo >> 11) & 1;
@ -313,11 +313,11 @@ ST_FUNC void relocate(TCCState *s1, ElfW_Rel *rel, int type, unsigned char *ptr,
j2 = s ^ (i2 ^ 1); j2 = s ^ (i2 ^ 1);
imm10 = (x >> 12) & 0x3ff; imm10 = (x >> 12) & 0x3ff;
imm11 = (x >> 1) & 0x7ff; imm11 = (x >> 1) & 0x7ff;
write16le(ptr, (uint16_t) ((hi & 0xf800) | write16le(ptr, (hi & 0xf800) |
(s << 10) | imm10)); (s << 10) | imm10);
write16le(ptr+2, (uint16_t) ((lo & 0xc000) | write16le(ptr+2, (lo & 0xc000) |
(j1 << 13) | blx_bit | (j2 << 11) | (j1 << 13) | blx_bit | (j2 << 11) |
imm11)); imm11);
} }
return; return;
case R_ARM_MOVT_ABS: case R_ARM_MOVT_ABS:

23
riscv64-gen.c
View File

@ -36,6 +36,7 @@
#include <assert.h> #include <assert.h>
#define UPPER(x) (((unsigned)(x) + 0x800u) & 0xfffff000) #define UPPER(x) (((unsigned)(x) + 0x800u) & 0xfffff000)
#define LOW_OVERFLOW(x) UPPER(x)
#define SIGN7(x) ((((x) & 0xff) ^ 0x80) - 0x80) #define SIGN7(x) ((((x) & 0xff) ^ 0x80) - 0x80)
#define SIGN11(x) ((((x) & 0xfff) ^ 0x800) - 0x800) #define SIGN11(x) ((((x) & 0xfff) ^ 0x800) - 0x800)
@ -135,14 +136,14 @@ static void ER(uint32_t opcode, uint32_t func3,
static void EI(uint32_t opcode, uint32_t func3, static void EI(uint32_t opcode, uint32_t func3,
uint32_t rd, uint32_t rs1, uint32_t imm) uint32_t rd, uint32_t rs1, uint32_t imm)
{ {
assert(! ((imm + (1 << 11)) >> 12)); assert(! LOW_OVERFLOW(imm));
EIu(opcode, func3, rd, rs1, imm); EIu(opcode, func3, rd, rs1, imm);
} }
static void ES(uint32_t opcode, uint32_t func3, static void ES(uint32_t opcode, uint32_t func3,
uint32_t rs1, uint32_t rs2, uint32_t imm) uint32_t rs1, uint32_t rs2, uint32_t imm)
{ {
assert(! ((imm + (1 << 11)) >> 12)); assert(! LOW_OVERFLOW(imm));
o(opcode | (func3 << 12) | ((imm & 0x1f) << 7) | (rs1 << 15) o(opcode | (func3 << 12) | ((imm & 0x1f) << 7) | (rs1 << 15)
| (rs2 << 20) | ((imm >> 5) << 25)); | (rs2 << 20) | ((imm >> 5) << 25));
} }
@ -158,7 +159,7 @@ ST_FUNC void gsym_addr(int t_, int a_)
uint32_t r = a - t, imm; uint32_t r = a - t, imm;
if ((r + (1 << 21)) & ~((1U << 22) - 2)) if ((r + (1 << 21)) & ~((1U << 22) - 2))
tcc_error("out-of-range branch chain"); tcc_error("out-of-range branch chain");
imm = (((r >> 12) & 0xff) << 12) imm = (((r >> 12) & 0xff) << 12)
| (((r >> 11) & 1) << 20) | (((r >> 11) & 1) << 20)
| (((r >> 1) & 0x3ff) << 21) | (((r >> 1) & 0x3ff) << 21)
| (((r >> 20) & 1) << 31); | (((r >> 20) & 1) << 31);
@ -179,7 +180,7 @@ static int load_symofs(int r, SValue *sv, int forstore, int *new_fc)
R_RISCV_PCREL_HI20, sv->c.i); R_RISCV_PCREL_HI20, sv->c.i);
*new_fc = 0; *new_fc = 0;
} else { } else {
if (((unsigned)fc + (1 << 11)) >> 12){ if (LOW_OVERFLOW(fc)){
large_addend = 1; large_addend = 1;
} }
greloca(cur_text_section, sv->sym, ind, greloca(cur_text_section, sv->sym, ind,
@ -206,7 +207,7 @@ static int load_symofs(int r, SValue *sv, int forstore, int *new_fc)
rr = 8; // s0 rr = 8; // s0
if (fc != sv->c.i) if (fc != sv->c.i)
tcc_error("unimp: store(giant local off) (0x%lx)", (long)sv->c.i); tcc_error("unimp: store(giant local off) (0x%lx)", (long)sv->c.i);
if (((unsigned)fc + (1 << 11)) >> 12) { if (LOW_OVERFLOW(fc)) {
rr = is_ireg(r) ? ireg(r) : 5; // t0 rr = is_ireg(r) ? ireg(r) : 5; // t0
o(0x37 | (rr << 7) | UPPER(fc)); //lui RR, upper(fc) o(0x37 | (rr << 7) | UPPER(fc)); //lui RR, upper(fc)
ER(0x33, 0, rr, rr, 8, 0); // add RR, RR, s0 ER(0x33, 0, rr, rr, 8, 0); // add RR, RR, s0
@ -251,7 +252,7 @@ ST_FUNC void load(int r, SValue *sv)
br = load_symofs(r, sv, 0, &fc); br = load_symofs(r, sv, 0, &fc);
} else if (v < VT_CONST) { } else if (v < VT_CONST) {
br = ireg(v); br = ireg(v);
/*if (((unsigned)fc + (1 << 11)) >> 12) /*if (LOW_OVERFLOW(fc))
tcc_error("unimp: load(large addend) (0x%x)", fc);*/ tcc_error("unimp: load(large addend) (0x%x)", fc);*/
fc = 0; // XXX store ofs in LVAL(reg) fc = 0; // XXX store ofs in LVAL(reg)
} else if (v == VT_LLOCAL) { } else if (v == VT_LLOCAL) {
@ -297,7 +298,7 @@ ST_FUNC void load(int r, SValue *sv)
zext = 1; zext = 1;
} }
} }
if (((unsigned)fc + (1 << 11)) >> 12) if (LOW_OVERFLOW(fc))
o(0x37 | (rr << 7) | UPPER(fc)), rb = rr; //lui RR, upper(fc) o(0x37 | (rr << 7) | UPPER(fc)), rb = rr; //lui RR, upper(fc)
if (fc || (rr != rb) || do32bit || (fr & VT_SYM)) if (fc || (rr != rb) || do32bit || (fr & VT_SYM))
EI(0x13 | do32bit, 0, rr, rb, SIGN11(fc)); // addi[w] R, x0|R, FC EI(0x13 | do32bit, 0, rr, rb, SIGN11(fc)); // addi[w] R, x0|R, FC
@ -392,7 +393,7 @@ ST_FUNC void store(int r, SValue *sv)
ptrreg = load_symofs(-1, sv, 1, &fc); ptrreg = load_symofs(-1, sv, 1, &fc);
} else if (fr < VT_CONST) { } else if (fr < VT_CONST) {
ptrreg = ireg(fr); ptrreg = ireg(fr);
/*if (((unsigned)fc + (1 << 11)) >> 12) /*if (LOW_OVERFLOW(fc))
tcc_error("unimp: store(large addend) (0x%x)", fc);*/ tcc_error("unimp: store(large addend) (0x%x)", fc);*/
fc = 0; // XXX support offsets regs fc = 0; // XXX support offsets regs
} else if (fr == VT_CONST) { } else if (fr == VT_CONST) {
@ -1014,7 +1015,7 @@ static void gen_opil(int op, int ll)
ll = ll ? 0 : 8; ll = ll ? 0 : 8;
if ((vtop->r & (VT_VALMASK | VT_LVAL | VT_SYM)) == VT_CONST) { if ((vtop->r & (VT_VALMASK | VT_LVAL | VT_SYM)) == VT_CONST) {
int fc = vtop->c.i; int fc = vtop->c.i;
if (fc == vtop->c.i && !(((unsigned)fc + (1 << 11)) >> 12)) { if (fc == vtop->c.i && !LOW_OVERFLOW(fc)) {
int cll = 0; int cll = 0;
int m = ll ? 31 : 63; int m = ll ? 31 : 63;
vswap(); vswap();
@ -1381,7 +1382,7 @@ ST_FUNC void ggoto(void)
ST_FUNC void gen_vla_sp_save(int addr) ST_FUNC void gen_vla_sp_save(int addr)
{ {
if (((unsigned)addr + (1 << 11)) >> 12) { if (LOW_OVERFLOW(addr)) {
o(0x37 | (5 << 7) | UPPER(addr)); //lui t0,upper(addr) o(0x37 | (5 << 7) | UPPER(addr)); //lui t0,upper(addr)
ER(0x33, 0, 5, 5, 8, 0); // add t0, t0, s0 ER(0x33, 0, 5, 5, 8, 0); // add t0, t0, s0
ES(0x23, 3, 5, 2, SIGN11(addr)); // sd sp, fc(t0) ES(0x23, 3, 5, 2, SIGN11(addr)); // sd sp, fc(t0)
@ -1392,7 +1393,7 @@ ST_FUNC void gen_vla_sp_save(int addr)
ST_FUNC void gen_vla_sp_restore(int addr) ST_FUNC void gen_vla_sp_restore(int addr)
{ {
if (((unsigned)addr + (1 << 11)) >> 12) { if (LOW_OVERFLOW(addr)) {
o(0x37 | (5 << 7) | UPPER(addr)); //lui t0,upper(addr) o(0x37 | (5 << 7) | UPPER(addr)); //lui t0,upper(addr)
ER(0x33, 0, 5, 5, 8, 0); // add t0, t0, s0 ER(0x33, 0, 5, 5, 8, 0); // add t0, t0, s0
EI(0x03, 3, 2, 5, SIGN11(addr)); // ld sp, fc(t0) EI(0x03, 3, 2, 5, SIGN11(addr)); // ld sp, fc(t0)

6
tccelf.c
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@ -1129,7 +1129,8 @@ static void relocate_section(TCCState *s1, Section *s, Section *sr)
qrel = (ElfW_Rel *)sr->data; qrel = (ElfW_Rel *)sr->data;
for_each_elem(sr, 0, rel, ElfW_Rel) { for_each_elem(sr, 0, rel, ElfW_Rel) {
if (s->data == NULL) continue; /* bss */ if (s->data == NULL) /* bss */
continue;
ptr = s->data + rel->r_offset; ptr = s->data + rel->r_offset;
sym_index = ELFW(R_SYM)(rel->r_info); sym_index = ELFW(R_SYM)(rel->r_info);
sym = &((ElfW(Sym) *)symtab_section->data)[sym_index]; sym = &((ElfW(Sym) *)symtab_section->data)[sym_index];
@ -3310,7 +3311,6 @@ invalid:
/* resolve symbols */ /* resolve symbols */
old_to_new_syms = tcc_mallocz(nb_syms * sizeof(int)); old_to_new_syms = tcc_mallocz(nb_syms * sizeof(int));
if (nb_syms == 0) goto skip;
sym = symtab + 1; sym = symtab + 1;
for(i = 1; i < nb_syms; i++, sym++) { for(i = 1; i < nb_syms; i++, sym++) {
if (sym->st_shndx != SHN_UNDEF && if (sym->st_shndx != SHN_UNDEF &&
@ -3343,7 +3343,7 @@ invalid:
sym->st_shndx, name); sym->st_shndx, name);
old_to_new_syms[i] = sym_index; old_to_new_syms[i] = sym_index;
} }
skip:
/* third pass to patch relocation entries */ /* third pass to patch relocation entries */
for(i = 1; i < ehdr.e_shnum; i++) { for(i = 1; i < ehdr.e_shnum; i++) {
s = sm_table[i].s; s = sm_table[i].s;

6
tccpp.c
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@ -117,6 +117,8 @@ ST_FUNC void expect(const char *msg)
#define USE_TAL #define USE_TAL
#define POINTER_SIZE sizeof(void *)
#ifndef USE_TAL #ifndef USE_TAL
#define tal_free(al, p) tcc_free(p) #define tal_free(al, p) tcc_free(p)
#define tal_realloc(al, p, size) tcc_realloc(p, size) #define tal_realloc(al, p, size) tcc_realloc(p, size)
@ -157,7 +159,7 @@ typedef struct TinyAlloc {
} TinyAlloc; } TinyAlloc;
typedef struct tal_header_t { typedef struct tal_header_t {
ALIGNED(PTR_SIZE) unsigned size; ALIGNED(POINTER_SIZE) unsigned size;
#ifdef TAL_DEBUG #ifdef TAL_DEBUG
int line_num; /* negative line_num used for double free check */ int line_num; /* negative line_num used for double free check */
char file_name[TAL_DEBUG_FILE_LEN + 1]; char file_name[TAL_DEBUG_FILE_LEN + 1];
@ -246,7 +248,7 @@ static void *tal_realloc_impl(TinyAlloc **pal, void *p, unsigned size TAL_DEBUG_
tal_header_t *header; tal_header_t *header;
void *ret; void *ret;
int is_own; int is_own;
unsigned adj_size = (size + PTR_SIZE - 1) & -PTR_SIZE; unsigned adj_size = (size + POINTER_SIZE - 1) & -POINTER_SIZE;
TinyAlloc *al = *pal; TinyAlloc *al = *pal;
tail_call: tail_call: