From d2c06612a51be7638bcfc63890dceb3d81b0550f Mon Sep 17 00:00:00 2001 From: OpenCode Date: Fri, 20 Mar 2026 16:49:41 +0700 Subject: [PATCH] arm64-asm: validate register width consistency in data processing instructions The asm_data_proc function was OR-ing register widths together, which allowed invalid ARM64 instructions like 'add x0, w1, w2' (mixed widths). ARM64 requires all registers in data processing instructions to have the same width (all X or all W). Fix by validating that all three operand registers have matching widths and emitting an error if they don't match. --- arm64-asm.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arm64-asm.c b/arm64-asm.c index 6af22197..3936b1e8 100644 --- a/arm64-asm.c +++ b/arm64-asm.c @@ -884,7 +884,9 @@ static void asm_data_proc(TCCState *s1, int token) tcc_error("immediate operand not valid for this instruction"); } else { rm = op3.reg; - is_64bit = (op1.reg_type & REG_X) || (op2.reg_type & REG_X) || (op3.reg_type & REG_X); + is_64bit = (op1.reg_type & REG_X); + if (is_64bit != !!(op2.reg_type & REG_X) || is_64bit != !!(op3.reg_type & REG_X)) + tcc_error("mismatched register widths"); gen_dp_reg(opcode, rd, rn, rm, is_64bit); } } else if (op2.type & OP_IM) {