mirror of
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arm64-win32 support : tests
This commit is contained in:
Benjamin Oldenburg
grischka
parent
03d58b0746
commit
ea823189d6
@ -338,7 +338,16 @@ int main(int argc, char **argv)
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#else
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#include <tcclib.h>
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#ifdef _WIN32
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# ifdef __i386__
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# define LIBTCC_TEST_WINAPI __attribute__((__stdcall__))
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# else
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# define LIBTCC_TEST_WINAPI
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# endif
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void LIBTCC_TEST_WINAPI Sleep(unsigned int milliseconds);
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#else
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unsigned int sleep(unsigned int seconds);
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#endif
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int fib(n)
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{
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@ -347,7 +356,11 @@ int fib(n)
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int main(int argc, char **argv)
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{
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#ifdef _WIN32
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Sleep(1000);
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#else
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sleep(1);
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#endif
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printf(" %d", fib(atoi(argv[1])));
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return 0;
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}
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280
tests/tests2/138_arm64_encoding.c
Normal file
280
tests/tests2/138_arm64_encoding.c
Normal file
@ -0,0 +1,280 @@
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/* ARM64 instruction encoding verification test.
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Exercises shift-by-immediate, load/store addressing modes,
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conditional branches, and system register access. */
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#include <stdio.h>
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#include <stdint.h>
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/* ---- shift-by-immediate helpers ---- */
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static uint32_t lsl32(uint32_t x, int n) { return x << n; }
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static uint32_t lsr32(uint32_t x, int n) { return x >> n; }
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static int32_t asr32(int32_t x, int n) { return x >> n; }
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static uint64_t lsl64(uint64_t x, int n) { return x << n; }
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static uint64_t lsr64(uint64_t x, int n) { return x >> n; }
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static int64_t asr64(int64_t x, int n) { return x >> n; }
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static void test_shifts(void)
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{
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printf("shift-imm:\n");
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printf("%x\n", lsl32(1, 0));
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printf("%x\n", lsl32(1, 15));
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printf("%x\n", lsl32(1, 31));
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printf("%x\n", lsr32(0x80000000U, 31));
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printf("%x\n", lsr32(0x80000000U, 16));
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printf("%x\n", asr32(-1, 1));
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printf("%x\n", asr32(-256, 4));
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printf("%llx\n", (unsigned long long)lsl64(1ULL, 0));
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printf("%llx\n", (unsigned long long)lsl64(1ULL, 32));
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printf("%llx\n", (unsigned long long)lsl64(1ULL, 63));
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printf("%llx\n", (unsigned long long)lsr64(0x8000000000000000ULL, 63));
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printf("%llx\n", (unsigned long long)asr64(-1LL, 1));
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printf("%llx\n", (unsigned long long)asr64(-256LL, 4));
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}
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/* ---- load/store with various addressing modes ---- */
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static void test_ldr_str(void)
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{
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int64_t buf[4] = { 0x1122334455667788LL, 0x99AABBCCDDEEFF00LL,
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0x0F1E2D3C4B5A6978LL, 0x0000000000000001LL };
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int64_t val;
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int32_t wval;
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int64_t *p;
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printf("ldr-str:\n");
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/* LDR X, [Xn, #offset] */
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val = buf[0];
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printf("%llx\n", (unsigned long long)val);
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val = buf[1];
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printf("%llx\n", (unsigned long long)val);
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/* LDR W, [Xn, #offset] (32-bit load) */
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wval = *(int32_t*)&buf[0];
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printf("%x\n", (unsigned)wval);
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/* Pre-indexed: store pointer, modify */
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p = &buf[0];
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val = *(p + 2);
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printf("%llx\n", (unsigned long long)val);
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/* Post-indexed simulation via pointer arithmetic */
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p = &buf[0];
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val = *p;
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p++;
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printf("%llx %llx\n", (unsigned long long)val,
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(unsigned long long)*p);
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}
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/* ---- STP/LDP (store/load pair) ---- */
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static void test_ldp_stp(void)
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{
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int64_t src[2] = { 0xAAAABBBBCCCCDDDDLL, 0x1111222233334444LL };
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int64_t dst[2];
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/* The compiler should use stp/ldp for this */
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dst[0] = src[0];
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dst[1] = src[1];
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printf("ldp-stp:\n");
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printf("%llx %llx\n",
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(unsigned long long)dst[0],
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(unsigned long long)dst[1]);
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}
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/* ---- CBZ / CBNZ via C patterns ---- */
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static const char *cbz_test(int x)
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{
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if (x == 0)
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return "zero";
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return "nonzero";
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}
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static const char *cbnz_test(int x)
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{
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if (x != 0)
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return "nonzero";
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return "zero";
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}
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static void test_cond_branches(void)
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{
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printf("cbz-cbnz:\n");
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printf("%s\n", cbz_test(0));
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printf("%s\n", cbz_test(42));
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printf("%s\n", cbnz_test(0));
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printf("%s\n", cbnz_test(42));
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}
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/* ---- conditional compare patterns (CCMP/CCMN) ---- */
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static int cond_select(int a, int b)
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{
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/* TCC should generate csel or equivalent */
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return a > b ? a : b;
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}
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static void test_cond_select(void)
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{
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printf("csel:\n");
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printf("%d\n", cond_select(5, 10));
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printf("%d\n", cond_select(10, 5));
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printf("%d\n", cond_select(0, 0));
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printf("%d\n", cond_select(-1, 1));
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}
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/* ---- MRS/MSR system registers (FPCR/FPSR) ---- */
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static void test_sysregs(void)
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{
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unsigned int fpcr, fpsr;
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printf("sysregs:\n");
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/* Read FPCR */
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__asm__ volatile ("mrs %0, fpcr" : "=r"(fpcr));
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printf("%u\n", fpcr & 0x0F);
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/* Read FPSR */
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__asm__ volatile ("mrs %0, fpsr" : "=r"(fpsr));
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printf("%u\n", fpsr);
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/* Write/restore FPCR (should be same value) */
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__asm__ volatile ("msr fpcr, %0" : : "r"(fpcr));
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/* Read back and verify */
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{
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unsigned int check;
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__asm__ volatile ("mrs %0, fpcr" : "=r"(check));
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printf("%s\n", check == fpcr ? "ok" : "fail");
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}
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}
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/* ---- NOP encoding (should not crash) ---- */
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static void test_nop(void)
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{
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printf("nop:\n");
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__asm__ volatile ("nop");
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__asm__ volatile ("nop");
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__asm__ volatile ("nop");
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printf("ok\n");
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}
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/* ---- barrier instructions ---- */
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static void test_barriers(void)
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{
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printf("barriers:\n");
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__asm__ volatile ("dmb sy");
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__asm__ volatile ("dsb sy");
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__asm__ volatile ("isb");
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printf("ok\n");
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}
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/* ---- MOV (register) patterns ---- */
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static int64_t mov_x0_x1(int64_t x)
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{
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register int64_t r __asm__("x0") = x;
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__asm__ volatile ("" : "=r"(r) : "0"(r));
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return r;
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}
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static void test_mov_reg(void)
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{
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printf("mov-reg:\n");
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printf("%lld\n", (long long)mov_x0_x1(42));
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printf("%lld\n", (long long)mov_x0_x1(-1));
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}
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/* ---- large struct passing (reference semantics) ---- */
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struct large { int64_t a, b, c, d; };
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static int64_t sum_large(struct large s)
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{
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return s.a + s.b + s.c + s.d;
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}
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static struct large make_large(int64_t a, int64_t b, int64_t c, int64_t d)
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{
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struct large s = { a, b, c, d };
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return s;
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}
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static void test_large_structs(void)
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{
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struct large s = { 1, 2, 3, 4 };
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struct large t;
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printf("large-struct:\n");
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printf("%lld\n", (long long)sum_large(s));
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t = make_large(10, 20, 30, 40);
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printf("%lld %lld %lld %lld\n",
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(long long)t.a, (long long)t.b,
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(long long)t.c, (long long)t.d);
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}
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/* ---- boundary-sized structs ---- */
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struct s18 { char x[18]; };
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struct s24 { char x[24]; };
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struct s32 { char x[32]; };
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static void print_s18(struct s18 s) { printf("%.18s\n", s.x); }
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static void print_s24(struct s24 s) { printf("%.24s\n", s.x); }
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static void print_s32(struct s32 s) { printf("%.32s\n", s.x); }
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static struct s18 ret_s18(void)
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{
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struct s18 s = { "123456789012345678" };
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return s;
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}
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static struct s24 ret_s24(void)
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{
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struct s24 s = { "123456789012345678901234" };
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return s;
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}
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static struct s32 ret_s32(void)
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{
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struct s32 s = { "12345678901234567890123456789012" };
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return s;
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}
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static void test_boundary_structs(void)
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{
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struct s18 a;
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struct s24 b;
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struct s32 c;
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printf("boundary-structs:\n");
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a = ret_s18();
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printf("%.18s\n", a.x);
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b = ret_s24();
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printf("%.24s\n", b.x);
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c = ret_s32();
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printf("%.32s\n", c.x);
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}
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int main(void)
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{
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test_shifts();
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test_ldr_str();
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test_ldp_stp();
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test_cond_branches();
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test_cond_select();
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test_sysregs();
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test_nop();
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test_barriers();
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test_mov_reg();
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test_large_structs();
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test_boundary_structs();
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return 0;
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}
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50
tests/tests2/138_arm64_encoding.expect
Normal file
50
tests/tests2/138_arm64_encoding.expect
Normal file
@ -0,0 +1,50 @@
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shift-imm:
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1
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8000
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80000000
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1
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8000
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ffffffff
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fffffff0
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1
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100000000
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8000000000000000
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1
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ffffffffffffffff
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fffffffffffffff0
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ldr-str:
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1122334455667788
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99aabbccddeeff00
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55667788
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f1e2d3c4b5a6978
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1122334455667788 99aabbccddeeff00
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ldp-stp:
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aaaabbbbccccdddd 1111222233334444
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cbz-cbnz:
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zero
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nonzero
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zero
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nonzero
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csel:
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10
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10
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0
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1
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sysregs:
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0
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0
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ok
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nop:
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ok
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barriers:
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ok
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mov-reg:
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42
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-1
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large-struct:
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10
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10 20 30 40
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boundary-structs:
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123456789012345678
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123456789012345678901234
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12345678901234567890123456789012
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91
tests/tests2/139_arm64_errors.c
Normal file
91
tests/tests2/139_arm64_errors.c
Normal file
@ -0,0 +1,91 @@
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/* ARM64 inline assembly error tests.
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Verify that invalid assembly produces proper error messages.
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Run with -dt; skipped on non-arm64 architectures. */
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#include <stdio.h>
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#if defined test_unknown_instruction
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int main(void)
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{
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__asm__("fubar x0, x1, x2");
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return 0;
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}
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#elif defined test_shift_imm_range_32
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int main(void)
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{
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/* LSL by 32 is out of range for 32-bit operand */
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__asm__("lsl w0, w1, #32");
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return 0;
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}
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#elif defined test_shift_imm_range_64
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int main(void)
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{
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/* LSL by 64 is out of range for 64-bit operand */
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__asm__("lsl x0, x1, #64");
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return 0;
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}
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#elif defined test_invalid_sysreg
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int main(void)
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{
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/* Bogus system register name */
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__asm__("mrs x0, bogusreg");
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return 0;
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}
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#elif defined test_invalid_barrier_option
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int main(void)
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{
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/* Invalid barrier scope name */
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__asm__("dmb xyz");
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return 0;
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}
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#elif defined test_missing_third_operand
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int main(void)
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{
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__asm__("add x0, x1");
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return 0;
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}
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#elif defined test_movz_imm_range
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int main(void)
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{
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__asm__("movz x0, #0x10000");
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return 0;
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}
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#elif defined test_movz_shift_range
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int main(void)
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{
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__asm__("movz x0, #1, lsl #8");
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return 0;
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}
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#elif defined test_invalid_muls
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int main(void)
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{
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__asm__("muls x0, x1, x2");
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return 0;
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}
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#elif defined test_extended_inline_asm
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int main(void)
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{
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int x = 1;
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/* Invalid operand reference in extended inline asm */
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__asm__("add %0, %1, #1" : "=r"(x) : "2"(x));
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return 0;
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}
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#elif defined test_extended_inline_clobber
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int main(void)
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{
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/* Invalid clobber register name */
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__asm__ volatile ("nop" : : : "bogus");
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return 0;
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}
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#endif
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32
tests/tests2/139_arm64_errors.expect
Normal file
32
tests/tests2/139_arm64_errors.expect
Normal file
@ -0,0 +1,32 @@
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[test_unknown_instruction]
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139_arm64_errors.c:10: error: ARM64 instruction 'fubar' not implemented
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[test_shift_imm_range_32]
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139_arm64_errors.c:17: error: shift immediate out of range
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[test_shift_imm_range_64]
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139_arm64_errors.c:25: error: shift immediate out of range
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[test_invalid_sysreg]
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139_arm64_errors.c:34: error: unsupported system register
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[test_invalid_barrier_option]
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139_arm64_errors.c:42: error: invalid operand 'xyz'
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[test_missing_third_operand]
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139_arm64_errors.c:48: error: missing third operand
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[test_movz_imm_range]
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139_arm64_errors.c:55: error: move wide immediate out of range
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[test_movz_shift_range]
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139_arm64_errors.c:62: error: move wide shift out of range
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[test_invalid_muls]
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139_arm64_errors.c:70: error: ARM64 instruction 'muls' not implemented
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[test_extended_inline_asm]
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139_arm64_errors.c:79: error: invalid reference in constraint 1 ('2')
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[test_extended_inline_clobber]
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139_arm64_errors.c:87: error: invalid clobber register 'bogus'
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451
tests/tests2/140_arm64_extasm.c
Normal file
451
tests/tests2/140_arm64_extasm.c
Normal file
@ -0,0 +1,451 @@
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/*
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* ARM64 Extended Inline Assembly Tests
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* Tests for GCC-style extended inline assembly with operands, constraints, and clobbers
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <assert.h>
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struct pair64 {
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uint64_t a;
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uint64_t b;
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};
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|
||||
static int arm64_symbol_target(void)
|
||||
{
|
||||
return 7;
|
||||
}
|
||||
|
||||
static void test_symbolic_address_constraint_compile_only(void)
|
||||
{
|
||||
asm volatile("" : : "S"(arm64_symbol_target));
|
||||
}
|
||||
|
||||
/* Test 1: Basic output operand */
|
||||
void test_basic_output(void)
|
||||
{
|
||||
int x;
|
||||
asm("mov %0, #42" : "=r"(x));
|
||||
assert(x == 42);
|
||||
printf("Test 1 (basic output): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 2: Input operand */
|
||||
void test_input_operand(void)
|
||||
{
|
||||
int x = 10;
|
||||
int y;
|
||||
asm("add %0, %1, #5" : "=r"(y) : "r"(x));
|
||||
assert(y == 15);
|
||||
printf("Test 2 (input operand): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 3: Read-write operand */
|
||||
void test_read_write_operand(void)
|
||||
{
|
||||
int x = 10;
|
||||
asm("add %0, %0, #1" : "+r"(x));
|
||||
assert(x == 11);
|
||||
printf("Test 3 (read-write operand): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 4: Memory operand - load */
|
||||
void test_memory_load(void)
|
||||
{
|
||||
int x = 42;
|
||||
int y;
|
||||
asm("ldr %w0, [%1]" : "=r"(y) : "r"(&x));
|
||||
assert(y == 42);
|
||||
printf("Test 4 (memory load): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 5: Memory operand - store */
|
||||
void test_memory_store(void)
|
||||
{
|
||||
int x;
|
||||
int val = 123;
|
||||
asm("str %w1, [%0]" : : "r"(&x), "r"(val));
|
||||
assert(x == 123);
|
||||
printf("Test 5 (memory store): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 5a: Stack memory operand with frame-relative offset */
|
||||
void test_stack_memory_operand(void)
|
||||
{
|
||||
long x = 0;
|
||||
long val = 321;
|
||||
|
||||
asm volatile("str %0, %1" : : "r"(val), "m"(x));
|
||||
assert(x == 321);
|
||||
printf("Test 5a (stack memory operand): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 5b: Symbol memory operand */
|
||||
static long arm64_symbol_mem;
|
||||
|
||||
void test_symbol_memory_operand(void)
|
||||
{
|
||||
long val = 654;
|
||||
|
||||
arm64_symbol_mem = 0;
|
||||
asm volatile("str %0, %1" : : "r"(val), "m"(arm64_symbol_mem));
|
||||
assert(arm64_symbol_mem == 654);
|
||||
printf("Test 5b (symbol memory operand): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 6: Clobber list */
|
||||
void test_clobber_list(void)
|
||||
{
|
||||
int x = 10;
|
||||
int y = 20;
|
||||
int result;
|
||||
asm("add %0, %1, %2"
|
||||
: "=r"(result)
|
||||
: "r"(x), "r"(y)
|
||||
: "cc");
|
||||
assert(result == 30);
|
||||
printf("Test 6 (clobber list): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 7: Multiple outputs */
|
||||
void test_multiple_outputs(void)
|
||||
{
|
||||
int a, b;
|
||||
asm("mov %0, #1; mov %1, #2"
|
||||
: "=r"(a), "=r"(b));
|
||||
assert(a == 1 && b == 2);
|
||||
printf("Test 7 (multiple outputs): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 8: Constraint reference */
|
||||
void test_constraint_reference(void)
|
||||
{
|
||||
int x = 10;
|
||||
int y;
|
||||
asm("add %0, %1, #5" : "=r"(y) : "0"(x));
|
||||
assert(y == 15);
|
||||
printf("Test 8 (constraint reference): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 9: Early clobber */
|
||||
void test_early_clobber(void)
|
||||
{
|
||||
int x = 10;
|
||||
int y;
|
||||
asm("mov %0, #42" : "=&r"(y) : "r"(x));
|
||||
assert(y == 42);
|
||||
printf("Test 9 (early clobber): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 10: 32-bit register modifier */
|
||||
void test_w_register(void)
|
||||
{
|
||||
uint32_t x = 100;
|
||||
uint32_t y;
|
||||
asm("add %w0, %w1, #50" : "=r"(y) : "r"(x));
|
||||
assert(y == 150);
|
||||
printf("Test 10 (w register modifier): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 11: Immediate constraint 'I' (12-bit immediate) */
|
||||
void test_immediate_i_constraint(void)
|
||||
{
|
||||
int x = 100;
|
||||
int y;
|
||||
asm("add %0, %1, #200" : "=r"(y) : "r"(x), "I"(200));
|
||||
assert(y == 300);
|
||||
printf("Test 11 (immediate I constraint): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 12: Register constraint */
|
||||
void test_general_operand_constraint(void)
|
||||
{
|
||||
int x = 50;
|
||||
int y;
|
||||
asm("add %0, %1, #10" : "=r"(y) : "r"(x));
|
||||
assert(y == 60);
|
||||
printf("Test 12 (general operand constraint): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 13: Multiple inputs and outputs */
|
||||
void test_multiple_io(void)
|
||||
{
|
||||
int a = 10, b = 20;
|
||||
int sum, diff;
|
||||
asm("add %0, %1, %2" : "=r"(sum) : "r"(a), "r"(b));
|
||||
asm("sub %0, %1, %2" : "=r"(diff) : "r"(a), "r"(b));
|
||||
assert(sum == 30 && diff == -10);
|
||||
printf("Test 13 (multiple IO): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 14: Register variable preservation */
|
||||
void test_regvar_preservation(void)
|
||||
{
|
||||
register uint64_t keep asm("x19") = 0x123456789abcdef0ULL;
|
||||
uint64_t out;
|
||||
|
||||
asm volatile("mov x19, #7; add %0, x19, #1"
|
||||
: "=r"(out)
|
||||
:
|
||||
: "x19");
|
||||
assert(keep == 0x123456789abcdef0ULL);
|
||||
assert(out == 8);
|
||||
printf("Test 14 (regvar preservation): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 15: Complex arithmetic */
|
||||
void test_complex_arithmetic(void)
|
||||
{
|
||||
int a = 100, b = 50, c = 25;
|
||||
int result;
|
||||
asm("add %0, %1, %2; sub %0, %0, %3"
|
||||
: "=&r"(result)
|
||||
: "r"(a), "r"(b), "r"(c));
|
||||
assert(result == 125);
|
||||
printf("Test 15 (complex arithmetic): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 16: Named operand (GCC extension) */
|
||||
void test_named_operand(void)
|
||||
{
|
||||
int input = 10;
|
||||
int output;
|
||||
asm("add %[out], %[in], #5"
|
||||
: [out] "=r"(output)
|
||||
: [in] "r"(input));
|
||||
assert(output == 15);
|
||||
printf("Test 16 (named operand): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 17: Memory clobber */
|
||||
void test_memory_clobber(void)
|
||||
{
|
||||
int x = 10;
|
||||
asm volatile("" : : : "memory");
|
||||
assert(x == 10);
|
||||
printf("Test 17 (memory clobber): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 18: Condition flags clobber */
|
||||
void test_cc_clobber(void)
|
||||
{
|
||||
int x = 100;
|
||||
int y;
|
||||
asm("adds %0, %1, #0" : "=r"(y) : "r"(x) : "cc");
|
||||
assert(y == 100);
|
||||
printf("Test 18 (cc clobber): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 19: Large immediate with movz/movk */
|
||||
void test_large_immediate(void)
|
||||
{
|
||||
uint64_t val;
|
||||
asm("movz %0, #0x1234, lsl #16; movk %0, #0x5678" : "=r"(val));
|
||||
assert(val == 0x12345678ULL);
|
||||
printf("Test 19 (large immediate): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 20: Bitwise operations */
|
||||
void test_bitwise_ops(void)
|
||||
{
|
||||
uint64_t a = 0xf0f0f0f00f0f0f0fULL;
|
||||
uint64_t b = 0x3333ffff0000ccccULL;
|
||||
uint64_t andv;
|
||||
uint64_t orv;
|
||||
uint64_t xorv;
|
||||
uint64_t imm_and;
|
||||
|
||||
asm("and %0, %1, %2" : "=r"(andv) : "r"(a), "r"(b));
|
||||
asm("orr %0, %1, %2" : "=r"(orv) : "r"(a), "r"(b));
|
||||
asm("eor %0, %1, %2" : "=r"(xorv) : "r"(a), "r"(b));
|
||||
asm("and %0, %1, %2" : "=r"(imm_and)
|
||||
: "r"(~0ULL), "L"(0xff00ff00ff00ff00ULL));
|
||||
|
||||
assert(andv == (a & b));
|
||||
assert(orv == (a | b));
|
||||
assert(xorv == (a ^ b));
|
||||
assert(imm_and == 0xff00ff00ff00ff00ULL);
|
||||
printf("Test 20 (bitwise ops): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 21: Register shift operands */
|
||||
void test_register_shift_operands(void)
|
||||
{
|
||||
uint64_t val = 3;
|
||||
uint64_t amount = 4;
|
||||
uint64_t shifted;
|
||||
uint64_t rotated;
|
||||
|
||||
asm("lsl %0, %1, %2" : "=r"(shifted) : "r"(val), "r"(amount));
|
||||
asm("ror %0, %1, %2" : "=r"(rotated)
|
||||
: "r"(0x0123456789abcdefULL), "r"(8ULL));
|
||||
assert(shifted == 48);
|
||||
assert(rotated == 0xef0123456789abcdULL);
|
||||
printf("Test 21 (register shifts): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 22: ROR immediate alias of EXTR */
|
||||
void test_ror_immediate(void)
|
||||
{
|
||||
uint64_t rotated;
|
||||
|
||||
asm("ror %0, %1, #8" : "=r"(rotated) : "r"(0x0123456789abcdefULL));
|
||||
assert(rotated == 0xef0123456789abcdULL);
|
||||
printf("Test 22 (ror immediate): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 23: FP/SIMD register constraint and modifier */
|
||||
void test_fp_register_operand(void)
|
||||
{
|
||||
double x = 3.5;
|
||||
double y;
|
||||
|
||||
asm("ldr %d0, [%1]" : "=w"(y) : "r"(&x));
|
||||
assert(y == x);
|
||||
printf("Test 23 (fp register operand): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 24: Zero constraint */
|
||||
void test_zero_constraint(void)
|
||||
{
|
||||
uint64_t x = 41;
|
||||
uint64_t y;
|
||||
|
||||
asm("add %0, %1, %x2" : "=r"(y) : "r"(x), "Z"(0));
|
||||
assert(y == x);
|
||||
printf("Test 24 (Z constraint): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 25: 32-bit logical immediate constraint */
|
||||
void test_logical_imm32_constraint(void)
|
||||
{
|
||||
uint32_t y;
|
||||
|
||||
asm("orr %w0, wzr, %1" : "=r"(y) : "K"(0xff));
|
||||
assert(y == 0xff);
|
||||
printf("Test 25 (K constraint): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 26: 64-bit logical immediate constraint */
|
||||
void test_logical_imm64_constraint(void)
|
||||
{
|
||||
uint64_t y;
|
||||
|
||||
asm("orr %0, xzr, %1" : "=r"(y) : "L"(0xff00ff00ff00ff00ULL));
|
||||
assert(y == 0xff00ff00ff00ff00ULL);
|
||||
printf("Test 26 (L constraint): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 27: 32-bit MOV pseudo immediate constraint */
|
||||
void test_mov_imm32_constraint(void)
|
||||
{
|
||||
uint32_t y;
|
||||
|
||||
asm("mov %w0, %1" : "=r"(y) : "M"(0x1234));
|
||||
assert(y == 0x1234);
|
||||
printf("Test 27 (M constraint): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 28: 64-bit MOV pseudo immediate constraint */
|
||||
void test_mov_imm64_constraint(void)
|
||||
{
|
||||
uint64_t y;
|
||||
|
||||
asm("mov %0, %1" : "=r"(y) : "N"(0x12340000ULL));
|
||||
assert(y == 0x12340000ULL);
|
||||
printf("Test 28 (N constraint): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 29: x FP/SIMD register constraint */
|
||||
void test_x_constraint_fp(void)
|
||||
{
|
||||
double x = 6.25;
|
||||
double y;
|
||||
|
||||
asm("ldr %d0, [%1]" : "=x"(y) : "r"(&x));
|
||||
assert(y == x);
|
||||
printf("Test 29 (x constraint): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 30: y FP/SIMD register constraint */
|
||||
void test_y_constraint_fp(void)
|
||||
{
|
||||
double x = 7.25;
|
||||
double y;
|
||||
|
||||
asm("ldr %d0, [%1]" : "=y"(y) : "r"(&x));
|
||||
assert(y == x);
|
||||
printf("Test 30 (y constraint): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 31: Q memory constraint */
|
||||
static int arm64_q_load(int *ptr)
|
||||
{
|
||||
int y;
|
||||
|
||||
asm("ldr %w0, %1" : "=r"(y) : "Q"(*ptr));
|
||||
return y;
|
||||
}
|
||||
|
||||
void test_q_memory_constraint(void)
|
||||
{
|
||||
int x = 91;
|
||||
assert(arm64_q_load(&x) == 91);
|
||||
printf("Test 31 (Q constraint): PASSED\n");
|
||||
}
|
||||
|
||||
/* Test 32: Ump pair-memory constraint */
|
||||
void test_ump_memory_constraint(void)
|
||||
{
|
||||
struct pair64 pair = { 0x1122334455667788ULL, 0x99aabbccddeeff00ULL };
|
||||
uint64_t a;
|
||||
uint64_t b;
|
||||
|
||||
asm("ldp %0, %1, %2" : "=r"(a), "=r"(b) : "Ump"(pair));
|
||||
assert(a == pair.a);
|
||||
assert(b == pair.b);
|
||||
printf("Test 32 (Ump constraint): PASSED\n");
|
||||
}
|
||||
|
||||
int main(void)
|
||||
{
|
||||
printf("ARM64 Extended Inline Assembly Tests\n");
|
||||
test_basic_output();
|
||||
test_input_operand();
|
||||
test_read_write_operand();
|
||||
test_memory_load();
|
||||
test_memory_store();
|
||||
test_stack_memory_operand();
|
||||
test_symbol_memory_operand();
|
||||
test_clobber_list();
|
||||
test_multiple_outputs();
|
||||
test_constraint_reference();
|
||||
test_early_clobber();
|
||||
test_w_register();
|
||||
test_immediate_i_constraint();
|
||||
test_general_operand_constraint();
|
||||
test_multiple_io();
|
||||
test_regvar_preservation();
|
||||
test_complex_arithmetic();
|
||||
test_named_operand();
|
||||
test_memory_clobber();
|
||||
test_cc_clobber();
|
||||
test_large_immediate();
|
||||
test_bitwise_ops();
|
||||
test_register_shift_operands();
|
||||
test_ror_immediate();
|
||||
test_fp_register_operand();
|
||||
test_zero_constraint();
|
||||
test_logical_imm32_constraint();
|
||||
test_logical_imm64_constraint();
|
||||
test_mov_imm32_constraint();
|
||||
test_mov_imm64_constraint();
|
||||
test_x_constraint_fp();
|
||||
test_y_constraint_fp();
|
||||
test_q_memory_constraint();
|
||||
test_ump_memory_constraint();
|
||||
test_symbolic_address_constraint_compile_only();
|
||||
printf("ARM64 Extended Inline Assembly Tests PASSED!\n");
|
||||
return 0;
|
||||
}
|
||||
36
tests/tests2/140_arm64_extasm.expect
Normal file
36
tests/tests2/140_arm64_extasm.expect
Normal file
@ -0,0 +1,36 @@
|
||||
ARM64 Extended Inline Assembly Tests
|
||||
Test 1 (basic output): PASSED
|
||||
Test 2 (input operand): PASSED
|
||||
Test 3 (read-write operand): PASSED
|
||||
Test 4 (memory load): PASSED
|
||||
Test 5 (memory store): PASSED
|
||||
Test 5a (stack memory operand): PASSED
|
||||
Test 5b (symbol memory operand): PASSED
|
||||
Test 6 (clobber list): PASSED
|
||||
Test 7 (multiple outputs): PASSED
|
||||
Test 8 (constraint reference): PASSED
|
||||
Test 9 (early clobber): PASSED
|
||||
Test 10 (w register modifier): PASSED
|
||||
Test 11 (immediate I constraint): PASSED
|
||||
Test 12 (general operand constraint): PASSED
|
||||
Test 13 (multiple IO): PASSED
|
||||
Test 14 (regvar preservation): PASSED
|
||||
Test 15 (complex arithmetic): PASSED
|
||||
Test 16 (named operand): PASSED
|
||||
Test 17 (memory clobber): PASSED
|
||||
Test 18 (cc clobber): PASSED
|
||||
Test 19 (large immediate): PASSED
|
||||
Test 20 (bitwise ops): PASSED
|
||||
Test 21 (register shifts): PASSED
|
||||
Test 22 (ror immediate): PASSED
|
||||
Test 23 (fp register operand): PASSED
|
||||
Test 24 (Z constraint): PASSED
|
||||
Test 25 (K constraint): PASSED
|
||||
Test 26 (L constraint): PASSED
|
||||
Test 27 (M constraint): PASSED
|
||||
Test 28 (N constraint): PASSED
|
||||
Test 29 (x constraint): PASSED
|
||||
Test 30 (y constraint): PASSED
|
||||
Test 31 (Q constraint): PASSED
|
||||
Test 32 (Ump constraint): PASSED
|
||||
ARM64 Extended Inline Assembly Tests PASSED!
|
||||
@ -38,6 +38,11 @@ struct hfa32 { long double a, b; } hfa32 = { 32.1, 32.2 };
|
||||
struct hfa33 { long double a, b, c; } hfa33 = { 33.1, 33.2, 33.3 };
|
||||
struct hfa34 { long double a, b, c, d; } hfa34 = { 34.1, 34.2, 34.3, 34.4 };
|
||||
|
||||
struct empty { };
|
||||
/* Keep the top-level offsets at zero without changing the type into a union. */
|
||||
struct hfae12 { struct empty e; struct hfa12 h; } hfae12 = { { }, { 112.1, 112.2 } };
|
||||
struct hfae22 { struct empty e; struct hfa22 h; } hfae22 = { { }, { 122.1, 122.2 } };
|
||||
|
||||
void fa_s1(struct s1 a) { printf("%.1s\n", a.x); }
|
||||
void fa_s2(struct s2 a) { printf("%.2s\n", a.x); }
|
||||
void fa_s3(struct s3 a) { printf("%.3s\n", a.x); }
|
||||
@ -82,6 +87,10 @@ void fa_hfa33(struct hfa33 a)
|
||||
{ printf("%.1Lf %.1Lf %.1Lf\n", a.a, a.b, a.c); }
|
||||
void fa_hfa34(struct hfa34 a)
|
||||
{ printf("%.1Lf %.1Lf %.1Lf %.1Lf\n", a.a, a.b, a.c, a.d); }
|
||||
void fa_hfae12(struct hfae12 a)
|
||||
{ printf("%.1f %.1f\n", a.h.a, a.h.b); }
|
||||
void fa_hfae22(struct hfae22 a)
|
||||
{ printf("%.1f %.1f\n", a.h.a, a.h.b); }
|
||||
|
||||
void fa1(struct s8 a, struct s9 b, struct s10 c, struct s11 d,
|
||||
struct s12 e, struct s13 f)
|
||||
@ -140,6 +149,8 @@ void arg(void)
|
||||
fa_hfa32(hfa32);
|
||||
fa_hfa33(hfa33);
|
||||
fa_hfa34(hfa34);
|
||||
fa_hfae12(hfae12);
|
||||
fa_hfae22(hfae22);
|
||||
fa1(s8, s9, s10, s11, s12, s13);
|
||||
fa2(s9, s10, s11, s12, s13, s14);
|
||||
fa3(hfa14, hfa23, hfa32);
|
||||
@ -178,6 +189,8 @@ struct hfa31 fr_hfa31(void) { return hfa31; }
|
||||
struct hfa32 fr_hfa32(void) { return hfa32; }
|
||||
struct hfa33 fr_hfa33(void) { return hfa33; }
|
||||
struct hfa34 fr_hfa34(void) { return hfa34; }
|
||||
struct hfae12 fr_hfae12(void) { return hfae12; }
|
||||
struct hfae22 fr_hfae22(void) { return hfae22; }
|
||||
|
||||
void ret(void)
|
||||
{
|
||||
@ -228,6 +241,8 @@ void ret(void)
|
||||
printf("%.1Lf %.1Lf\n", fr_hfa32().a, fr_hfa32().b);
|
||||
printf("%.1Lf %.1Lf\n", fr_hfa33().a, fr_hfa33().c);
|
||||
printf("%.1Lf %.1Lf\n", fr_hfa34().a, fr_hfa34().d);
|
||||
printf("%.1f %.1f\n", fr_hfae12().h.a, fr_hfae12().h.b);
|
||||
printf("%.1f %.1f\n", fr_hfae22().h.a, fr_hfae22().h.b);
|
||||
}
|
||||
|
||||
void*
|
||||
|
||||
@ -28,6 +28,8 @@ cdefghijklmnopqrs
|
||||
32.1 32.1
|
||||
33.1 33.2 33.3
|
||||
34.1 34.2 34.3 34.4
|
||||
112.1 112.2
|
||||
122.1 122.2
|
||||
stu ABC JKL TUV 456 ghi
|
||||
ABC JKL TUV 456 ghi tuv
|
||||
14.1 14.4 23.1 23.3 32.1 32.2
|
||||
@ -62,6 +64,8 @@ cdefghijklmnopqrs
|
||||
32.1 32.2
|
||||
33.1 33.3
|
||||
34.1 34.4
|
||||
112.1 112.2
|
||||
122.1 122.2
|
||||
stdarg:
|
||||
ABCDEFGHI ABCDEFGHI ABCDEFGHI ABCDEFGHI ABCDEFGHI ABCDEFGHI
|
||||
lmnopqr ABCDEFGHI ABCDEFGHI ABCDEFGHI ABCDEFGHI ABCDEFGHI
|
||||
|
||||
Loading…
Reference in New Issue
Block a user