arm64-asm: validate register width consistency in data processing instructions

The asm_data_proc function was OR-ing register widths together, which
allowed invalid ARM64 instructions like 'add x0, w1, w2' (mixed widths).
ARM64 requires all registers in data processing instructions to have
the same width (all X or all W).

Fix by validating that all three operand registers have matching widths
and emitting an error if they don't match.
This commit is contained in:
OpenCode 2026-03-20 16:49:41 +07:00 committed by Benjamin Oldenburg
parent a27bd8a7c3
commit d2c06612a5

View File

@ -884,7 +884,9 @@ static void asm_data_proc(TCCState *s1, int token)
tcc_error("immediate operand not valid for this instruction");
} else {
rm = op3.reg;
is_64bit = (op1.reg_type & REG_X) || (op2.reg_type & REG_X) || (op3.reg_type & REG_X);
is_64bit = (op1.reg_type & REG_X);
if (is_64bit != !!(op2.reg_type & REG_X) || is_64bit != !!(op3.reg_type & REG_X))
tcc_error("mismatched register widths");
gen_dp_reg(opcode, rd, rn, rm, is_64bit);
}
} else if (op2.type & OP_IM) {