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  • a338258d30 Fix qualifiers on const array struct members mob Mounir IDRASSI 2026-06-13 21:30:00 +0900
  • fb4077f2da CI: fix win32 MSVC setup and arm64 test Meng Zhuo 2026-06-12 10:23:45 +0800
  • 724b24eeb4 riscv64: implement float/double constant loading Meng Zhuo 2026-06-12 09:55:15 +0800
  • d8aee9b26e riscv64: consolidate riscv intrinsics into lib-riscv.c Meng Zhuo 2026-06-12 09:51:00 +0800
  • b8f680a3b4 CI: use RISE runner to test riscv64 Meng Zhuo 2026-06-02 16:18:59 +0800
  • 1444843fd1 riscv64-link: fix C90 mixed declaration warning Meng Zhuo 2026-05-31 22:36:41 +0800
  • 6b53465347 riscv64: enable gen_clear_cache with I-cache flushing Meng Zhuo 2026-05-31 22:36:41 +0800
  • 3b1fe97a59 win32: define arm64 Interlocked helpers in winnt.h Mounir IDRASSI 2026-05-23 17:38:56 +0900
  • 904e95cbdf win32: avoid Interlocked imports for tcc arm64 Mounir IDRASSI 2026-05-21 08:13:41 +0900
  • 601a088214 win32: improve tccrun protection diagnostics Mounir IDRASSI 2026-05-15 19:03:01 +0900
  • 1a54e47dda pe: add dll characteristic linker options Mounir IDRASSI 2026-05-15 18:58:28 +0900
  • 37b7247796 win32: run cv2pdb without shell quoting issues Mounir IDRASSI 2026-05-15 18:54:56 +0900
  • 6a7c3df4d5 win32: make compile lock initialization thread-safe Mounir IDRASSI 2026-05-15 18:49:26 +0900
  • 757507eb02 fix: skip TLS test on osx Meng Zhuo 2026-05-13 12:28:58 +0800
  • 6728a64f1b win32: use VirtualAlloc for run memory Mounir IDRASSI 2026-05-13 14:25:22 +0900
  • 256b4ef63c fix: TLS test failures on osx/win32/armv7 Meng Zhuo 2026-05-13 12:28:58 +0800
  • 8502540b4a feat(i386): add TLS Local Exec code generation and linker relocations Meng Zhuo 2026-05-13 10:30:10 +0800
  • 841ce0da03 feat(arm): add TLS Local Exec code generation and linker relocations Meng Zhuo 2026-05-13 10:29:44 +0800
  • 8abaf10ab5 feat(arm64): add TLS Local Exec code generation and linker relocations Meng Zhuo 2026-05-12 20:02:08 +0800
  • 11f5c6e1f9 feat(riscv64): add TLS Local Exec code generation and linker relocations Meng Zhuo 2026-05-12 19:57:35 +0800
  • ea26b85ac0 feat(x86_64): add TLS Local Exec support with tests Meng Zhuo 2026-05-12 20:01:59 +0800
  • 8443e25bf5 feat: implement Thread Local Storage frontend support Meng Zhuo 2026-05-12 19:57:26 +0800
  • fad812360b tccgen: fix void expression side effect regression inostensibl 2026-05-09 21:49:37 -0400
  • 2888e49f39 riscv64-gen: implement gen_clear_cache Meng Zhuo 2026-05-07 12:54:20 +0800
  • c77339ab41 riscv64: emit .riscv.attributes section in ELF output Meng Zhuo 2026-05-07 11:39:41 +0800
  • 7f764f340f riscv64-asm: complete AMO aq/rl suffixes for all ops Meng Zhuo 2026-05-07 11:39:41 +0800
  • a672babc6f tests: fix 141_riscv_asm AMO crash, restore full test coverage Meng Zhuo 2026-05-07 11:39:02 +0800
  • 44977b0de8 tcctest: restore & combine grischka 2026-05-06 10:26:41 +0200
  • 6daf1617ef configure & tcc.h: include & lib searchpath cleanup grischka 2026-02-02 15:54:11 +0100
  • 923fba83f1 general: long double issues grischka 2026-05-02 21:30:39 +0200
  • 7e01b20362 tccgen: void values, etc... grischka 2026-01-10 21:51:08 +0100
  • 016087c954 riscv64-asm: implement AMO, fcvt rounding, and fcvt encoding fixes Meng Zhuo 2026-05-06 19:13:01 +0800
  • f8011ea9b7 riscv64-asm: implement CSR pseudo-instructions Meng Zhuo 2026-05-06 15:05:06 +0800
  • 199369bb17 tests: generate test.ref with TCC instead of host CC Meng Zhuo 2026-05-06 14:43:30 +0800
  • 3935c3bb55 riscv64-asm: add basic F/D extension instructions (fadd/fsub/fmul/fdiv) Meng Zhuo 2026-05-03 00:33:53 +0800
  • 273978b927 riscv64-asm: implement pseudo-instructions sext.w, fmv, fneg Meng Zhuo 2026-05-03 00:31:10 +0800
  • 2a33daedca tccasm: extend .reloc directive for RISCV64 relocation types Meng Zhuo 2026-05-03 00:29:09 +0800
  • 3257afa160 riscv64-link: add R_RISCV_RELATIVE case in relocate() Meng Zhuo 2026-05-03 00:24:42 +0800
  • 419b527657 riscv64-asm: implement far branches via expansion Meng Zhuo 2026-05-03 00:17:33 +0800
  • 5c2240a896 riscv64-asm: remove long long 'not implemented' errors in inline asm Meng Zhuo 2026-05-03 00:14:41 +0800
  • 366569eb7a riscv64-asm: fix neg/negw pseudo-instruction encoding Meng Zhuo 2026-05-03 00:09:53 +0800
  • ff917c09aa riscv64: implement gen_cvt_sxtw with addiw instruction Meng Zhuo 2026-05-03 00:06:38 +0800
  • 9f0915a506 riscv64: implement gen_cvt_csti for narrow int promotion Meng Zhuo 2026-05-02 23:58:23 +0800
  • 69c8e92566 riscv64: add PROMOTE_RET for narrow return ABI compliance Meng Zhuo 2026-05-02 23:52:34 +0800
  • 30afb50e64 arm64-win32 review: fix problems and pass tests grischka 2026-05-04 10:30:15 +0200
  • 576cd2a923 arm64-win32 support: symbolic op-code constants Benjamin Oldenburg 2026-04-04 16:29:28 +0200
  • 44e6853cb1 arm64-win32 support: target PE & varargs Benjamin Oldenburg 2026-04-04 16:29:28 +0200
  • 5c728d6506 arm64-win32 support: improve HFA & struct Benjamin Oldenburg 2026-04-04 16:29:28 +0200
  • 90d17c9748 arm64-win32 support: use arm64_sub_sp() Benjamin Oldenburg 2026-04-04 16:29:28 +0200
  • 99713bcbfa arm64-win32 support: use arm64_sym() Benjamin Oldenburg 2026-04-04 16:29:28 +0200
  • 303badef22 arm64-win32 support: fix scaled mask Benjamin Oldenburg 2026-04-04 16:29:28 +0200
  • 41bcb4a78f arm64-win32 support : linker & -run Benjamin Oldenburg 2026-04-04 16:29:28 +0200
  • f459aff5f6 arm64-win32 support : arm64 assembler Benjamin Oldenburg 2026-04-04 16:29:28 +0200
  • ea823189d6 arm64-win32 support : tests Benjamin Oldenburg 2026-04-04 16:29:28 +0200
  • 03d58b0746 arm64-win32 support : runtime Benjamin Oldenburg 2026-04-04 16:29:28 +0200
  • ff5d3b4874 arm64-win32 support : configure & Makefiles Benjamin Oldenburg 2026-04-04 16:29:28 +0200
  • d9a6d9aec0 reverts (11/2025 - 04/2026) grischka 2026-05-02 20:19:48 +0200
  • a66ac623b2 win32: add missing AttachConsole export to kernel32.def H-language 2026-05-01 09:58:03 +1200
  • 4768b11737 tccrun: fix OOB read in elf_output_obj after tcc_relocate with -g Cyan Ogilvie 2026-04-30 15:36:56 -0300
  • b39da9f6fa Fix false warnings with readonly atomics Petr Skocik 2026-04-28 08:40:53 +0200
  • 5675177b7f allow $ at nonstarting positions in asm symbols under -fdollars-in-identifiers Petr Skocik 2025-10-23 16:48:26 +0200
  • 543d84c668 .gitignore: Add tests/libtcc_test_xor_rex Reini Urban 2026-04-26 14:56:39 +0200
  • 9b8765d8ba Revert commits from OpenCode-AI and a partial regression fix Detlef Riekenberg 2026-04-20 01:42:41 +0200
  • 7b92d2dcd2 Fix warning Anon 2026-04-16 13:16:17 -0700
  • 169628a6ab tccgen: Fix optional semicolon regression Zuhaitz-dev 2026-04-16 17:24:21 +0100
  • 8ecfd0a722 Relicensing TinyCC Cyan Ogilvie 2026-04-16 10:45:24 -0300
  • 690fb14015 x86_64-gen: fix missing REX prefix for xor zero into r8-r15 Cyan Ogilvie 2026-04-16 10:22:00 -0300
  • d5ecb52a71 tests: add test for x86_64 xor REX prefix bug in load() Cyan Ogilvie 2026-04-16 10:20:33 -0300
  • 6547ea47d6 No more ; needed OpenCode[AI] 2026-04-15 20:56:01 -0700
  • 898f496dc9 Add AGENTS.md OpenCode[AI] 2026-04-15 20:28:42 -0700
  • 8b5ab1bb01 arm64: reject invalid asm and clean run argv Benjamin Oldenburg 2026-04-04 21:29:28 +0700
  • 42d85ec622 docs: add lesson learned - arm64 win32 run validation Benjamin Oldenburg 2026-04-04 21:29:15 +0700
  • 2d07e45370 tccpp: fix clang dangling-else warning Benjamin Oldenburg 2026-04-04 20:19:11 +0700
  • 2b48b4de8f arm64: avoid MSVC ARM64 sysreg macro warning Benjamin Oldenburg 2026-04-04 20:02:21 +0700
  • d683afdead win32: fix nested -run argv and exit callbacks Benjamin Oldenburg 2026-04-04 19:34:54 +0700
  • d349980ef4 docs: add lesson learned - windows nested run runtime Benjamin Oldenburg 2026-04-04 19:32:49 +0700
  • f37fbab915 Fix ARM64 asm and Windows -run support Benjamin Oldenburg 2026-03-23 04:19:22 +0700
  • 052e40ddd0 arm64: fix win32 self-hosting regressions Benjamin Oldenburg 2026-03-22 05:19:10 +0700
  • b698bffaa8 tests: enable arm64 errors tests2 case Benjamin Oldenburg 2026-03-22 02:29:56 +0700
  • 7f685b4562 tests: refresh arm64 tests2 coverage Benjamin Oldenburg 2026-03-22 02:23:59 +0700
  • b00a298673 docs: add lesson learned - arm64 tests2 drift Benjamin Oldenburg 2026-03-22 02:08:53 +0700
  • 1a4d228070 tests: fix ARM64 test failures OpenCode 2026-03-22 02:06:07 +0700
  • c032c8638a Add arm64 encoding and error tests Benjamin Oldenburg 2026-03-21 19:02:43 +0000
  • 0414fdddbd tests: cover arm64 regvar and bitwise asm Benjamin Oldenburg 2026-03-22 02:00:14 +0700
  • e7a16ce876 arm64: finish GNU inline asm constraint support Benjamin Oldenburg 2026-03-21 06:28:11 +0700
  • 49819a5e46 docs: add lesson learned - one-source static collisions Benjamin Oldenburg 2026-03-21 03:56:22 +0700
  • 80434781e3 docs: add lesson learned - arm64 immediate formatting Benjamin Oldenburg 2026-03-21 02:45:42 +0700
  • 5f179d6885 docs: add lesson learned - arm64 asm test widths Benjamin Oldenburg 2026-03-21 02:13:20 +0700
  • a8cccbabb9 docs: add lesson learned - arm64 inline asm reg mapping Benjamin Oldenburg 2026-03-21 02:00:59 +0700
  • d4dfb428df tests2: skip ARM64 tests on non-ARM64 architectures Benjamin Oldenburg 2026-03-20 15:39:36 +0000
  • 987a2aa909 arm64-asm: fix operator precedence warning in is_valid_logical_imm OpenCode 2026-03-20 22:45:01 +0700
  • 62345bb113 refactor: replace remaining ARM64 opcode literals with symbolic constants Benjamin Oldenburg 2026-03-21 01:15:15 +0700
  • 7d2f376843 refactor: replace vector load/store and struct load opcodes with symbolic constants (Phase 2.2) Benjamin Oldenburg 2026-03-21 00:58:48 +0700
  • 84842db4b2 refactor: replace load instruction opcodes with symbolic constants (Phase 2.2 step 1) Benjamin Oldenburg 2026-03-21 00:52:53 +0700
  • 714214a047 refactor: replace hardcoded MOVZ/MOVN/MOVK opcodes with symbolic constants Benjamin Oldenburg 2026-03-21 00:35:32 +0700
  • 38cff9b8ef feat: add missing ARM64 opcode constants and helper macros Benjamin Oldenburg 2026-03-21 00:27:33 +0700
  • 1a55a3e041 fix(arm64): verify and correct all opcode constants against ARM ARM Benjamin Oldenburg 2026-03-20 23:48:19 +0700
  • f0d9ddf0eb feat(arm64): add HW shift field macro for MOVZ/MOVN instructions Benjamin Oldenburg 2026-03-20 23:33:14 +0700
  • 0d361ad607 refactor(arm64): use symbolic constants in gsym_addr Benjamin Oldenburg 2026-03-20 23:30:16 +0700
  • c6e3606fae refactor(arm64): use symbolic constants in arm64_spoff Benjamin Oldenburg 2026-03-20 23:29:40 +0700