Commit Graph

96 Commits

Author SHA1 Message Date
Meng Zhuo
724b24eeb4 riscv64: implement float/double constant loading 2026-06-12 10:26:51 +08:00
Meng Zhuo
11f5c6e1f9 feat(riscv64): add TLS Local Exec code generation and linker relocations 2026-05-13 09:37:42 +08:00
Meng Zhuo
2888e49f39 riscv64-gen: implement gen_clear_cache
Emit fence + fence.i (Zifencei extension) for I/D cache
synchronization, needed for tcc -run mode on RISC-V.
Zifencei is required by the RISC-V Linux ABI and present
on all Linux-capable cores, though technically not part
of the RV64G base ISA.
2026-05-07 16:07:53 +08:00
Meng Zhuo
ff917c09aa riscv64: implement gen_cvt_sxtw with addiw instruction
Replaces the empty stub that relied on 'RV64 registers are always
sign-extended' assumption.  Now emits addiw rd, rs, 0 for proper
32-to-64 bit sign extension, matching arm64's sxtw behavior.

Verified on Spacemit X100: tests2 pass (125_atomic_misc has a
pre-existing intermittent segfault, not caused by this change).
2026-05-06 12:30:34 +08:00
Meng Zhuo
9f0915a506 riscv64: implement gen_cvt_csti for narrow int promotion
Add sign/zero extension for char/short to int casts using
slli+srai (signed) or slli+srli/andi (unsigned) sequences.
Also adds RISCV64 to the gen_cvt_csti fast-path conditional
in tccgen.c:3466, matching arm64/i386/x86_64.

Verified on Spacemit X100: all tests2 pass, no regressions.
2026-05-06 12:30:34 +08:00
Meng Zhuo
69c8e92566 riscv64: add PROMOTE_RET for narrow return ABI compliance
Other mature backends (i386, x86_64, arm64) all define PROMOTE_RET,
which forces explicit sign/zero extension of narrow return types at the
caller side.  Without it, riscv64 relied on the assumption that RV64
registers are always sign-extended, which may not hold when interfacing
with non-TCC compilers.

Verified on Spacemit X100 (riscv64): self-compilation is self-consistent
across 3 layers.  test3 reference mismatch is expected — the test
intentionally invokes UB via type-punned function pointers (csf macro).
2026-05-06 12:30:34 +08:00
grischka
5ec0e6f84b some reverts & fixes
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workflow:
- revert 'pinact for security' for readability
  from 831c3fa184
tccpp.c:
- remove code that allows tcc to parse numbers incorrectly (*)
  from 829c848520
tccgen.c:
- Revert "Relaxed the 'incompatible pointer type' warning a bit" (*)
  from d9ec17d334.
tccrun.c:
- remove support for -nostdlib -run
  for simplicity, we require "main" with tcc -run always
tccpp.c:
- Revert "Free all preprocessor memmory in case of error."
  from c96f0cad61
  Remove TinyAlloc->limit instead.  Thus it can do also bigger
  allocs.  Big TokenStrings (like 200kb+ when compiling tcc)
  may come from inline functions or from large initializers.
Makefile/configure:
- use --config-pie for configuring tcc output only
- use -fPIC with clang-x86_64 to avoid 32-bit relocs
libtcc.c:
- fix "tcc file.c -run" i.e. -run as last argument
i386-gen.c:
- PIC refactor

(*) sorry, but code in tcc should have a minimum of generic relevance
2026-01-10 13:46:23 +01:00
herman ten brugge
8a8388c6ff Solve some bug reports
The savannah web site had some new bug report last december.
A lot of them are assemmbly bugs.
See testcase 60 for an overview.
2026-01-06 07:49:02 +01:00
Dylan Fei
11118be717 Fix pointer difference issue in aarch64/riscv64
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When calculating the difference between two pointers (TOK_PDIV), the
AArch64 and RISC-V64 backends used unsigned division
instructions (udiv/divu).

This patch moves TOK_PDIV to use signed division instructions (sdiv/div)
for both backends, ensuring correct behavior as per the C standard.
2025-12-23 16:01:10 +08:00
herman ten brugge
8569427459 Move -run -nostdlib code to lib directory
tcc.h, arm-gen.c, arm64-gen.c, i386-gen.c, riscv64-gen.c, x86_64-gen.c:
- remove old code

tccrun.c:
- update to use lib/run_nostdlib.c

Makefile, lib/Makefile, lib/run_nostdlib.c:
- new code

tests/nostdlib_test.c:
- testcode
2025-12-15 14:45:11 +01:00
Aleksi Hannula
0fcd46f364
rv64: Generate VT_CMP output from float comparison 2025-12-02 07:30:31 +02:00
Aleksi Hannula
e7be7b192d
Simplify RV64 function epilogue
Previous sp can be computed based from only frame pointer and short
offset. ra and s0 can be restored from stack with constant fp offset.
2025-11-28 15:17:06 +02:00
herman ten brugge
3e8f1da9c5 Change asm into __asm__ in previous commit
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2025-11-17 19:17:53 +01:00
herman ten brugge
c52b96cf85 Allow -nostdlib -run
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The -run option did not support -nostdlib correctly.
The argc/argc/envp are now passed on stack according to sysv.

This implementation does not work for TCC_TARGET_PE.
Also arm64 does not work when running tcc compiled with itself.
This is because arm64 assembly is not implemented yet.

The following test code is used to check the code:

  #include <unistd.h>
  #include <sys/syscall.h>
  void _start() {
    syscall(SYS_write, 1, "hello world\n", 12);
    syscall(SYS_exit, 0);
  }

Run this with:
./tcc -nostdlib -lc -run a.c
make tcc_c
./tcc_c -nostdlib -lc -run a.c
2025-11-17 14:00:15 +01:00
grischka
2662b7b43c tccgen: local scope for types of function parameters
int foo(struct xxx {int x[3];} *p) { ...

We want 'xxx' be visible only inside the function. To get that,
the patch removes the 'sym_push(param)' in xxx-gen.c, and instead
(in tccgen.c:gen_function()) pushes all symbols that were newly
defined during parsing of the parameter list in post_type().

Also,
- decl_initializer_alloc():
  patch existing globals earlier, which updates flex arrays too
- let patch_type() do the 'redefinition' check and FUNC_OLD update
2025-08-18 21:06:03 +02:00
herman ten brugge
03184fe33b riscv target did not handle FUNC_OLD correctly.
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2025-08-11 06:49:22 +02:00
herman ten brugge
8a0ccbbd94 Another update for clang -fsanitize
arm-link.c:    remove some casts
tccelf.c:      code style and remove code
tccpp.c:       use correct pointer size so cross compiling works
riscv64-gen.c: make code more readable
2025-08-03 10:22:26 +02:00
herman ten brugge
666e88ee2a Update for clang -fsanitize
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I tried to fix all remaining warnings/errors reported by -fsanitize.

The riscv64-gen.c is a bit large because it contained a lot of warnings.
I forgot some arm-link.c changes in last commit.
The other changes are all small fixes to avoid warnings/errors.
2025-07-29 08:26:57 +02:00
herman ten brugge
2eca4df6e9 Correct riscv load_large_constant
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2025-07-18 08:15:58 +02:00
herman ten brugge
7c23c48a93 Riscv struct saving
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While adding some testcases for attribute cleanup I found a
bug in the riscv code. It modifies the sv->c.i in load_symofs.
If a structure contains more then one element only the
first is stored correctly. This only happens on a large
stack frame.
Fixed by saving/restoring sv->c.i.
2025-07-17 06:50:15 +02:00
grischka
83de532563 revert "Save registers around attribute cleanup" (almost)
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In fact, we don't need to save registers.  We need to
save the symbol if it is a SValue on vstack (the return
value in this case)

Replaces b6a16e3be4
2025-05-25 00:20:23 +02:00
herman ten brugge
b6a16e3be4 Save registers around attribute cleanup
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This makes attribute cleanup code work the same as gcc and also
makes bound checking a very little bit faster.

tcc.h:
  Add save_return_reg(CType *) and restore_return_reg(CType *)
  Change gfunc_epilog() to gfunc_epilog(Sym *)

arm-gen.c:
arm64-gen.c:
c67-gen.c:
i386-gen.c:
il-gen.c:
riscv64-gen.c:
x86_64-gen.c:
  Move save and restore register around bound_local_delete call
  to save_return_reg and restore_return_reg.
  Pass func_type from gfunc_epilog to gen_bounds_epilog.

tccgen.c:
  Call save_return_reg/restore_return_reg in try_call_scope_cleanup
  when RETURN is found.

tccrun.c:
  Fix warning when bound checking not used.

tests/tests2/101_cleanup.c
tests/tests2/101_cleanup.expect
  Extra checks attribute cleanup save/restore registers.

tests/tests2/Makefile:
  Fix when bound checking not used.
2025-05-22 16:58:12 +02:00
grischka
006174449e cleanups & stuff
libtcc.c:
- free 'elfint' string
- acceot  -O and -Os
- accept -gstabs (to override dwarf when default)
- better -Wp,...

tccpp.c:
- #line cleanup
  also warn with "extra tokens after directive"

tccgen.c & xxx_gen.c:
- force CPU flags to register earlier

tccelf.c:
- tcc_load_object: align size only for code sections
  data/bss objects are always put with their specfic type align
      (in decl_initializer_alloc())
  x86/64 doesn't need aligned code
  from c6afdff7ab

tccpe.c:
- enable dllimport for "_imp__<sym>" also from assembler

x86_64-gen.c & lib/libtcc1.c:
- simpler fneg without libtcc1 reference

tests2/134_double_to_signed.c:
- a tcc compiled by msvc won't pass this test
2025-03-11 22:56:01 +01:00
herman ten brugge
8cd21e91cc Address of solved for riscv64
A character size load was used instead of pointer size some times.
2024-06-01 07:29:28 +02:00
Ekaitz Zarraga
0aca861194 fixup! riscv: Implement large addend for global address
Use `t1` instead of `t0` for the cases when `rr` is not set so `t0` is
used by default and this happens:

    lui t0, XXX
    add t0, t0, t0

Instead, now we do:

    lui t1, XXX
    add t0, t0, t1
2024-04-28 00:15:23 +02:00
Ekaitz Zarraga
6b3cfdd025 riscv: Add extended assembly support
NOTE: In order to be able to deal with general-purpose vs floating-point
registers, this commit adds a flag in the 6th bit of the register. If
set, it means the register is a floating-point one. This affects all the
assembler.
2024-04-09 00:19:41 +02:00
Ekaitz Zarraga
7bc0cb5ba0 riscv: Implement large addend for global address 2024-02-29 19:42:02 +01:00
Ekaitz Zarraga
6426cc3384 Revert "riscv64-gen: Fix load and store type_size usage"
It was already contemplated by c81116e29a.

This reverts commit c7263571d2.
2024-01-30 17:41:26 +01:00
Ekaitz Zarraga
c7263571d2 riscv64-gen: Fix load and store type_size usage
In `load` and `store` RISC-V gen used `type_size` to retrieve the size
of the types being moved around, the problem with that function is it
tries to obtain internal information of the type. When using `type_size`
with a `char *` it returns 1, and emits a `lb` instruction when using a
conditional expression like so (but probably also in other cases):

    char *a, *b;
    b = "hello";
    a = x ? b : "" ;                // this emits an `lb`

That `lb` clobbers the pointer, only loading the latest byte of it:

    // if `b` was, say: 0x1f822e
    a = b;
    // now `a` is 0x00002e

NOTE: We spotted this when building make-3.82, in `init_switches`
      function in the `main.c` file. This error made `make` unable to
      run long options like `make --help` (segfault when doing the
      `strlen` later)

This happens because a `char *` is internally stored as a `char[1]` or
something similar, it's result is the size of a `char` (1) times the
size of the array `1`. This is not what we want, we are copying the
pointer, not the array itself. Using `type_size` for this is not
appropriate even if it works for some cases.

If the conditional expression is rewritten to imperative style using an
`if` it works properly, so it might be related with the fact the pointer
is `load`ed to a register.

`load` and `store` should only work with integral types, so reading the
size of the array is not useful. This commit creates a simpler version
of this function that only reads the integral type of what's working
with: char * is considered just a pointer. So it makes an `ld` instead,
and the code above works.
2024-01-29 11:09:59 +01:00
Ziyao
b006b98334
Fix passing of large function arguments on riscv64
- Correct stack adjustment in gfunc_call()
- Add a regression test (130_large_argument)
2023-04-09 06:06:10 +08:00
herman ten brugge
ac9eeea1d5 Enable vla_test-run on all targets
Fix gen_vla_sp_save/gen_vla_sp_restore in riscv64-gen.c
2022-12-06 11:21:50 +01:00
herman ten brugge
2f2708a769 Add dwarf support
The new gcc12 release does not support stabs any more.
This was a good reason to add support for dwarf.

The stabs code still works and is used if configure option --dwarf
is not used.

Tested on x86_64, i386, arm, arm64, riscv64 with dwarf-5.
Some debuggers may not support dwarf-5. Try using older dwarf versions
i that case.
The tccmacho.c code probably need some support for dwarf.

arm-gen.c, arm64-gen.c, i386-gen.c, riscv64-gen.c, x86_64-gen.
- fix get_sym_ref symbol size

arm-link.c, arm64-link.c, i386-link.c, riscv64-link.c, x86_64-link.c
- add R_DATA_32U

libtcc.c:
- parse -gdwarf option

tcc.c:
- add dwarf option

tcc.h:
- add dwarf option and sections

tccelf.c:
- init dwarf sections
- avoid adding sh_addr for dwarf sections
- remove dwarf relocs for output dll
- add dwarf sections for tccrun

tccgen.c:
- add dwarf defines + global data
- add dwarf_* functions
- mix dwarf code with stabs code
- a trick is used to emit function name in .debug_line section so
  only this section has to be parsed instead of .debug_info and
  .debug_abbrev.
- fix init debug_modes

tccrun.c:
- add dwarf sections in rt_context
- init them in tcc_run
- add new dwarf code rt_printline_dwarf to find file/function

dwarf.h:
- New file

tcc-doc.texi:
- document dwarf

configure:
- add dwarf option

lib/Makefile
- change -gstabs into -gdwarf

lib/bt-exe.c, tests/tests2/Makefile, tests/tests2/126_bound_global:
- Add __bound_init call
- Add new testcase to test it
2022-05-05 09:10:37 +02:00
herman ten brugge
184d845838 Fix riscv64 test 90 after struct init commit 2022-03-17 17:16:24 +01:00
mingodad
1645616843 Revert "Move almost all global variables to TCCState, actually all tests pass on Ubuntu 18.04 x86_64"
This reverts commit af686a796b.
2021-10-22 07:39:54 +02:00
mingodad
2ce2dbcb09 Revert "Fix some errors on arm64-asm.c, rename some variables, fix several code style declarations"
This reverts commit 61537d899a.
2021-10-22 07:39:26 +02:00
mingodad
61537d899a Fix some errors on arm64-asm.c, rename some variables, fix several code style declarations 2021-10-22 07:20:00 +02:00
mingodad
af686a796b Move almost all global variables to TCCState, actually all tests pass on Ubuntu 18.04 x86_64 2021-10-21 20:09:42 +02:00
herman ten brugge
b5d4b908c4 Fix function call on arm64 and riscv
arm64-gen.c/riscv64-gen.c
- Copy code from x86_64-gen.c (fetch cpu flag before generating any code)

tests/tcctest.c:
- Add test code
2021-06-22 07:38:39 +02:00
grischka
72f1dea537 tccelf: use rodata_section, use more rodata in tcc itself
libtcc.c: add -Wwrite-strings to -Wall
tccgen.c: ro float-consts, string-consts, ro arrays if base type is
tccpe.c: merge IAT with rodata
tccrun.c: mprotect rodata accordingly. free section data after copy
x86_64.c: do not use got for static data.
tcc -bench: show data.rw/ro

Probably STB_LOCAL should never get to put_got_entry(), and currently
it doesn't seem to happen (See "Hack Alarm" there)

Other files: use more ro-data in tinycc
2021-02-18 14:43:34 +01:00
grischka
1ed4b6ba1a debug_modes, re-unalign, cleanups
tccgen.c: debug_modes
- don't waste debug function calls during normal execution.
libtcc.c:
- mem_debug: no C99 features in tcc please, for example
  ({compound expressions}): do not use.
tccgen.c: struct_layout:
- unaligned access is completely ok for most targets.
- Moreover the patch was triggering single byte mode even
  for normal aligned access (as with tcc's SymAttr)

static Sym label: don't do this

arm-gen.c:
- use some #ifdefs to explain some code
tccpp.c:
- cleanup UCN chars
libtcc.c:
- replace openbsd library search
configure:
- cleanup strip fallouts
tccgen.c:
- expr_cond(): remove an exotic optimization that eventually
  got fixed to do the contrary by a gv(RC_InT)
- pop_local_syms(): remove some args
- init_putv() : use write##le functions to avoid cross-compiler
  unaligned access
- __bt_init(): remove unused param 'mode'
2021-01-24 18:00:33 +01:00
herman ten brugge
bc6c0c34c1 implement test coverage
I have implemented the -ftest-coverage option. It works a bit different
from the gcc version. It output .tcov text file which looks almost the
same as a gcov file after a executable/so file is run.

Add lib/tcov.c file
Modify Makefiles to compile/install it
Add -ftest-coverage option in tcc.c/tcc.h/tcc-doc.texi
Add code to tccelf.c/tccgen.c/tccpe.c
Add gen_increment_tcov to tcc.h/*gen.c

unrelated changes:
Add sigemptyset in tccrun.c
Fix riscv64-gen.c tok_alloc label size
2021-01-23 18:17:38 +01:00
herman ten brugge
2633c30fb4 riscv64 update
implement load/store to constant address
use VT_LLONG instead of VT_PTR in register passing
fix bound checking problem with small structs
enable riscv tests in tests/tcctest.c and tests/tests2/119_random_stuff.c
2021-01-01 20:36:57 +01:00
grischka
ea82d0826d tccpp: cleanup target-os defines
moved target_machine defines to the <target>-gen.c files.

Also:
- c2str.c moved into conftest.c
- tccdefs.h ; defined(__TINYC__) && !defined(_LOCORE) removed
  (in tinycc __TINYC__ is always defined and _LO... is never.)
- stddef.h : too many #ifdefs, removed
- tccgen.c:stabs: support win32 long doubles aka doubles.
- win32: math.h/tcc_libm.h: fix pointer mismatch in modfl
- tccpp.c: increment include_stack_ptr after the file was
  actually found otherwise it would print
  "in file included from <itself>: file not found..."
2020-12-31 02:03:31 +01:00
grischka
cf8d9cf072 win64: fix pe_isafunc()
- tccpe.c: commit "tidy support for helper function" created
  STT_NOTYPE symbols and hence relied on ad-hoc detection which
  didn't work for x86_64 (as reported by Christian Jullien)

- tccgen.c: However to be more safe the helper symbols are
  now made STT_FUNC anyway (via new VT_ASM_FUNC).

Also:
- tcc.h: minor reorder
- riscv64-*, arm64-*, tccmacho.c: avoid some gcc format-warnings
  (mingw-gcc complains about "%llx" being "unknown conversion",
  although it does work since Vista or so)
2020-11-26 16:11:17 +01:00
grischka
4a42b0d95e tidy support for helper function such as memmove
tcc.h, tccgen.c: Introduce Sym *external_helper_sym(int v);
  to create an external reference with no specific type. This
  avoids type conflicts if the symbol is used from C too.
the other files: use it.
2020-11-24 11:47:02 +01:00
herman ten brugge
afc0917f88 Bound checking fixes
tccgen.c:
- Fix 'tcc -b conftest.s'
- Add offset during bound checking for struct return

lib/bcheck.c:
- Check overlap when reusing vla/alloca

arm-gen.c:
arm64-gen.c:
riscv64-gen.c:
lib/alloca86-bt.S:
- add space for vla/alloca during bound checking

tests/tests2/Makefile:
tests/tests2/121_struct_return:
tests/tests2/122_vla_reuse:
- New test cases with bound checking enabled to test vla and struct return
2020-10-01 17:09:09 +02:00
herman ten brugge
4a16bebfab Struct va_arg fix
lib/va_list.c:
- Handle struct {double, double} correctly

arm64-gen.c:
riscv64-gen.c:
x86_64-gen.c:
- Allow zero sized structs to work with va_arg

tcctest.c:
- Add new va_arg test code

test/bug.c:
- Remove tst2 va_arg test
2020-09-17 08:42:28 +02:00
Michael Matz
a614269794 riscv64: Fix a corner case
found in mpfr.  Expressions like "(longlong)i <= MAX_ULONGLONG" are
always true (not yet short-circuited in tcc), but still need to be
handled correctly in the backends.
2020-07-15 21:47:39 +02:00
herman ten brugge
c1e1c17c0a Move bound functions to tccgen.c
Move gen_bounded_ptr_add() and gen_bounded_ptr_deref() code to tccgen.c
No functional changes.
2020-07-12 10:55:40 +02:00
grischka
2a0167adfe __builtin_/__bound_: A 'stay tiny' approach to the matter
tccgen.c:
- cleanup __builtin_... stuff
- merge __attribute((alias("sym"))) with __asm__("sym")
    Now one cannot have both, however for alias underscores are
    added if enabled.  For __asm__ they aren't.
tccpp.c:
- extend tcc_predefs accordingly.  Was generated with
  'cd tests/misc && tcc -run c2str.c tcc_predef.h tcc_predefs'
xxx-gen.c:
- move bcheck setjmp test to tccgen.c:gbound_args()
i386-gen.c:
- create win32 compatible stack space for big structures
tcctest.c:
- some cleanup + nicer output
2020-07-06 13:42:02 +02:00